Synopsys, Inc. announced Sondrel has adopted the Synopsys Fusion Design™ and Verification Continuum® platforms to accelerate the design and verification of large, complex system-on-chip (SoC) designs for automotive, AI, machine learning, IoT, consumer AR/VR gaming, and security applications. Sondrel plans to use solutions from Synopsys' design and verification platforms to create power-efficient designs for their customers. As Sondrel expands its capabilities to transform designs into tested, volume-packaged silicon, Synopsys was chosen based on several critical benchmarks to replace its legacy design systems. Synopsys' track-record of power-efficient designs and power, performance and area metrics drove Sondrel's decision to adopt the industry-leading design and verification technologies enabling power-efficient SoC designs with the best quality-of-results (QoR) and time-to-results. Sondrel plans to use Synopsys' design and verification platform solutions to enable the creation of some of the most complex and power-efficient architectures for their customers. Sondrel's focus on the design of large digital multi-core complex fabrics stems from decades of extensive expertise configuring leading processor architectures and targeting advanced process nodes from leading foundries. The Synopsys Fusion Design Platform solutions and features include: Fusion Compiler™ RTL-to-GDSII implementation system, IC Compiler™ II place-and-route solution with machine-learning technologies, Design Compiler® NXT leading synthesis solution for advanced nodes, IC Validator physical signoff delivering cloud-optimized physical signoff including DRC, LVS, PERC and Fill, PrimeTime® golden timing signoff solution, PrimePower for RTL to signoff power analysis, StarRC™ golden signoff parasitic extraction solution, TestMAX™ DFT provides comprehensive advanced design-for-test solution across a range of complexities and Formality® equivalence checking for rapidly growing chip functionality and best verifiable QoR.