Paul Boudre, CEO of Soitec, told us last week in Grenoble, "Evidence [for FD-SOI's advantages] is there. But some choose not to see it."

PARIS - As a reporter, I've never covered a technology that generates more geographically-divided perceptions, innuendo and controversy among semiconductor engineers than FD-SOI.

You'd think that if the choice is a matter of science, engineers would simply pick the one that works better.

However, as with anything in engineering life, choice always involves trade-offs among power, performance, cost, technology readiness, and market-timing.

Perhaps more important, if you're opting for a less-traveled road (not following your competitors), your decision will involve greater risks. It will impact your company's future and your own career.

Paul Boudre, CEO of Soitec, told us last week in Grenoble, "Evidence [for FD-SOI's advantages] is there. But some choose not to see it."

To be fair, FD-SOI is a technology three decades in the making and perfecting. FD-SOI's genuine advantage wasn't obvious at process nodes such as 40nm or 32nm, but "we are seeing a window [of opportunity] now at 28-nm node," said Marie-Noëlle Semeria, CEA-Leti CEO, during the Leti's open house event last week.

As "small things that are highly connected" become the focus of innovation for mobility and IoT, she explained FD-SOI is a critical ingredient that enables low-power, low-cost, connected miniature products.

EE Times has collected the most frequently asked questions on FD-SOI (and the industry's common perceptions on FD-SOI). Responses reflect the testimony of FD-SOI advocates.

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