Faraday Technology Corporation launched its SerDes (serializer/deserializer) total solution comprises SerDes IP design on UMC 28nm and the corresponding IP advanced (IPA) service which includes IP subsystem integration, PHY hardcore implementation, and signal integrity/power integrity (SI/PI) analysis on the system with package and PCB design. Already, Faraday has successfully integrated the SerDes total solution into mass-produced ASICs for Fiber-to-the-Home (FttH), home gateways, Ethernet switches, SSD, industrial automation, and 5G baseband, and other applications. Combining silicon-proved SerDes IP with Faraday's IPA service speeds customer into mass production.

That's because the IP subsystem integration reduces the time needed to perform IP verification of interface protocol function in the system and the PHY hardcore implementation ensures the interface performance based on the customer's dedicated configuration. Meanwhile, IPA service provides the PCB layout guideline and supports the SI/PI analysis to increase data transfer throughput without system error. Using in-house IC Automatic Test Equipment (ATE) and compliance measuring instruments, the IPA service can accelerate the testing flow at different temperatures in the lab for problem-solving before mass production.