Already, Faraday has successfully integrated the SerDes total solution into mass-produced ASICs for Fiber-to-the-Home (FttH), home gateways, Ethernet switches, SSD, industrial automation, and 5G baseband, and other applications.
Reduces time to market
Combining silicon-proved SerDes IP with Faraday's IPA service speeds customer into mass production. That's because the IP subsystem integration reduces the time needed to perform IP verification of interface protocol function in the system and the PHY hardcore implementation ensures the interface performance based on the customer's dedicated configuration.
Meanwhile, IPA service provides the PCB layout guideline and supports the SI/PI analysis to increase data transfer throughput without system error. Using in-house IC Automatic Test Equipment (ATE) and compliance measuring instruments, the IPA service can accelerate the testing flow at different temperatures in the lab for bug-solving before mass production.
'Faraday's newly launched SerDes total solution is designed to accelerate customer's integration. This SerDes IP integrated with Faraday's PCIe Gen-4 PCS and controller IP has successfully passed the compliance tests held by PCI-SIG. With more than 20 years of experiences with SoCs, high-speed IO and DDR interface design, we are well acquainted with how to help customers to cut down the time to bring their ASICs to market. As a result, we believe the total solution is an efficient and effective choice for applications that require SerDes,' said Flash Lin, COO of
Faraday's SerDes IP at UMC 28nm is compliant with
PCIe Gen2/3/4 protocols
Ethernet: 10G-KR, 40G-KR4/CR4, and 1000Base/SGMII
xPON: 10GEPON, EPON, XGPON, XGSPON, GPON
About
Contact:
Tel: +886.3.578.7888
Email: evan@faraday-tech.com
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