Alphawave Semi Tapes Out Industry-First, Multi-Protocol I/O Connectivity Chiplet for High-Performance Compute and AI Infrastructure
Chiplets are becoming increasingly important in high-performance compute (HPC) and artificial intelligence (AI) applications as they provide essential connectivity at a higher bandwidth and lower power than traditional infrastructure technologies without the need for extensive customization or development. By choosing commercial off-the-shelf chiplets, end customers can optimize performance and efficiency while benefiting from reduced development time, lower costs, and greater flexibility with their existing hardware ecosystems. Delivering a total bandwidth of up to 1.6 Tbps, the Alphawave Semi chiplet enables up to 16 lanes of multi-standard PHY supporting silicon-proven PCIe 6.0, CXL 3.x, and 800G Ethernet in a combination of mixed operating modes. The announcement of the successful tape-out also paves the way for a robust, open chiplet ecosystem that accelerates connectivity for high-performance AI systems by employing UCIe as a die-to-die connectivity subsystem. An industry-first live demo of Alphawave Semi?s 24 Gbps UCIe silicon platform was recently unveiled at the Chiplet Summit 2024 in Santa Clara, CA.