Advantest Corporation announced that the company has installed the first evaluation unit of its new test cell at Marvell, integrating the company's T2000 Enhanced Performance Package (EPP) and its M4841 Dynamic Test Handler. The T2000+M4841 Test Cell, capable of handling up to 16 devices in parallel, is designed to achieve the industry's lowest cost on final testing of high-volume, cost-sensitive semiconductors, including baseband processors, application processors, microprocessors, microcontrollers and highly integrated power-management integrated circuits (PMICs). The evaluation unit has been in trial use at Marvell's engineering center since January 2012.

Based on measured performance, the x16 Test Cell has been released for production for Marvell products. The T2000+M4841 Test Cell leverages the T2000 EPP's industry-leading parallel efficiency, innovative computing, bus architecture and high-density instrumentation to test as many as 16 complex system-on-chip (SoC) devices at one time without sacrificing accuracy or overall throughput. With the industry's largest socket area on its load boards, the T2000's test head architecture maximizes the number of devices that can be tested simultaneously, while also simplifying the linkage with Advantest's M4841 test handler.

The handler is optimized for high throughput and low testing cost. It also maintains a high mean contact between jams (MCBJ) and the handler's soft-touch feature safeguards singulated IC packages from scratches and other potential damage. As a result, the integrated T2000+M4841 Test Cell offers customers the highest parallel final-test capabilities for the broadest range of SoC devices.